
- What Slows SIMPLIS Down? (3)
- Extremely Small Time Constants
- For each PWL topology, SIMPLIS simulation step size is automatically determined by the smallest time constant in circuit
- Extremely small step size results in very slow simulations
- Keep smallest time constant > 10e-14 seconds
- We routinely see circuits with time constants < 10e-18 seconds
- Track your time constants during modeling process
Always be clear about the simulation objective of every simulation
Only include the modeling complexity needed to obtain the required accuracy