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» DVM Test Report: Steady-State|Steady-State|Vin Minimum|90%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Minimum|90%
Date / Time 12/10/2015 5:47 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinMinimum\90%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 68.6937%
Efficiency_Min 68.6937%
Frequency(CLK) 955.637k
ILOAD
AVG
1.35049
MIN
1.34732
MAX
1.3536
RMS
1.35049
PK2PK
6.27533m
ISRC
AVG
657.943m
MIN
381.334u
MAX
1.6184
RMS
950.603m
PK2PK
1.61802
Power(LOAD) 2.03323
Power(SRC) 2.95984
VLOAD
AVG
1.50554
MIN
1.50201
MAX
1.509
RMS
1.50554
PK2PK
6.99577m
VSRC
AVG
4.49934
MIN
4.49838
MAX
4.5
RMS
4.49934
PK2PK
1.61802m
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.509) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50201) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
ILOAD
VLOAD
SXGPH File simplis_pop32_1104.sxgph
SRC
ISRC
VSRC
SXGPH File simplis_pop32_1094.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop32_1099.sxgph
Other SXGPH Files
clock#pop simplis_pop32_1086.sxgph