back to overview ▲

» DVM Test Report: Steady-State|Steady-State|Vin Nominal|20%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|20%
Date / Time 12/10/2015 5:43 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\20%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 88.3118%
Efficiency_nom 88.3118%
Frequency(CLK) 955.662k
ILOAD
AVG
300.134m
MIN
299.37m
MAX
300.744m
RMS
300.135m
PK2PK
1.37425m
ISRC
AVG
102.35m
MIN
423.264u
MAX
567.443m
RMS
197.595m
PK2PK
567.02m
Power(LOAD) 451.902m
Power(SRC) 511.712m
VLOAD
AVG
1.50566
MIN
1.50183
MAX
1.50872
RMS
1.50566
PK2PK
6.89408m
VSRC
AVG
4.9999
MIN
4.99943
MAX
5
RMS
4.9999
PK2PK
567.02u
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50872) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50183) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop3_89.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop3_79.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop3_84.sxgph
Other SXGPH Files
clock#pop simplis_pop3_71.sxgph