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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|30%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|30%
Date / Time 12/10/2015 5:43 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\30%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 85.3047%
Efficiency_nom 85.3047%
Frequency(CLK) 955.657k
ILOAD
AVG
450.198m
MIN
449.037m
MAX
451.143m
RMS
450.198m
PK2PK
2.10645m
ISRC
AVG
158.939m
MIN
423.32u
MAX
723.014m
RMS
284.516m
PK2PK
722.591m
Power(LOAD) 677.842m
Power(SRC) 794.613m
VLOAD
AVG
1.50565
MIN
1.50177
MAX
1.50881
RMS
1.50565
PK2PK
7.04482m
VSRC
AVG
4.99984
MIN
4.99928
MAX
5
RMS
4.99984
PK2PK
722.591u
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50881) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50177) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop4_124.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop4_114.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop4_119.sxgph
Other SXGPH Files
clock#pop simplis_pop4_106.sxgph