Test Details | |
Schematic | 4_multi_tone.sxsch |
Test | Bode Plot|DC Input|POP-AC|PWM multiplier |
Date / Time | 11/17/2016 11:30 AM |
Report Directory | DVM_REPORTS\2016-11-17-11_20_AM\Bode Plot\DC Input\POP-AC\PWM multiplier |
Log File | report.txt |
Screenshot | schematic.png |
Status | WARN |
Simulator | simplis |
Deck | input.deck |
Init | input.deck.init |
Measured Scalar Values | |
Efficiency | 95.0946% |
gain_crossover_freq | 11.3576 |
gain_margin | Unable to determine gain_margin |
ILOAD | AVG 500.116m MIN 500.085m MAX 500.172m RMS 500.116m PK2PK 87.6286u |
ISRC | AVG 1.84149 MIN 1.84144 MAX 1.84154 RMS 1.84149 PK2PK 101.347u |
min_phase | 10.7993 |
min_phase_freq | 50 |
phase_crossover_freq | Unable to determine phase_crossover_freq |
phase_margin | 49.131 |
Power(LOAD) | 200.093 |
Power(SRC) | 210.415 |
VLOAD | AVG 400.093 MIN 400.068 MAX 400.138 RMS 400.093 PK2PK 70.1029m |
VSRC | AVG 114.263 MIN 114.263 MAX 114.263 RMS 114.263 PK2PK 40.5387u |
Measured Spec Values | |
Max_VLOAD | PASS: Max. Output1 Voltage (400.138) is less than or equal to Max. Output1 Voltage Spec (420) |
Min_VLOAD | PASS: Min. Output1 Voltage (400.068) is greater than or equal to Min. Output1 Voltage Spec (380) |
min_gain_margin | WARN: Unable to determine min_gain_margin |
min_phase_margin | PASS: Phase Margin (49.131) is greater than Min. Phase Margin (35) |
![]() Bode Plot
GAIN
PHASE
|
|
SXGPH File | simplis_ac1_131.sxgph |
![]() AC
IL
|
|
SXGPH File | simplis_pop1_125.sxgph |
![]() LOAD
VLOAD
ILOAD
|
|
SXGPH File | simplis_pop1_116.sxgph |
![]() SRC
VSRC
ISRC
|
|
SXGPH File | simplis_pop1_111.sxgph |
Other SXGPH Files | |
default#105#pop | simplis_pop1_105.sxgph |
new#pop | simplis_pop1_100.sxgph |