Generates a netlist for the currently selected schematic. The netlist command also assigns names to schematic nets. If the schematic contains hierarchical blocks, their underlying schematics will also be netlisted and included in the main netlist as subcircuits.
Netlist
[/num] [/subckt] [/nopinnames] [/noOutput] [/template]\n
[/sep] [/diag] [/top] [/plain] [/lang] [/wireTemplate]\n
[/dotEnd] [/noDescend] [/f11Top] [/simplis] [/nodemap] [filename]
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/diag |
If specified, a diagnostic report will be produced. This details: Implicit node connections (using terminal symbol). Bus name translations. These occur if two buses with different names are connected. Dangling wires and unused device pins. If the diag is set to partial, only dangling wires and pins are reported. |
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/dotEnd |
Forces .END to be placed at the end of the netlist. |
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/f11Top |
The contents of the F11 window are placed before the netlist lines generated by the schematic. Otherwise they are placed after the schematic netlist lines. |
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/handle |
Netlist schematic using handle obtained from OpenSchematic . If the specified schematic is currently open, the netlist generated will reflect the displayed version rather than the contents of the file. May not be used with /path option |
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/inhibitTemplateScripts |
Inhibits execution of template scripts |
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/lang |
Name of language to be output at the top of the netlist output. This is in the form "*#language" and is used by SIMetrix for compatibility with other simulators. Default is "SIMETRIX". |
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/nodemap |
Generates SIMPLIS .NODE_MAP controls for user named nets. |
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/noDescend |
Netlister does not descend into hierarchy and processes items at the top level only. |
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/noOutput |
If specified, no netlist output is generated. The net names attached to wires are updated. |
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/nopinnames |
If specified, the pinnames specifier is not output for X devices. The pinnames specifier is proprietary to SIMetrix and is not supported by other simulators. Use this option if you are creating the netlist for another purpose e.g. to input to an LVS program. |
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/num |
If specified, a SPICE 2 compatible netlist using node numbers is created. |
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/paramsSeparator |
Inhibits execution of template scripts |
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/path |
If specified, the netlist operation will be performed on the schematic at the specified file system path. If the specified schematic is currently open, the netlist generated will reflect the displayed version rather than the contents of the file. May not be used with /handle |
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/plain |
Equivalent to /noPinnames /top /lang none. |
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/selSubOut |
Inhibits execution of template scripts |
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/sep |
May be a single character or "none". Default is '$'. To comply with SPICE syntax each device line starts with a letter that identifies the type of device. Usually this letter is determined by the MODEL property. If the component reference of the device does not begin with the correct letter it is prefixed with the correct letter followed by the character specified by this option. |
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/simplis |
Specify this if creating a netlist for use with SIMPLIS. Forces switches: /dotEnd /f11Top /nodemap /num /nopinnames /sort. If /template is not specified, a default of /template simplis_template|template will be forced. Finally if /wireTemplate is not specified, a default of /wireTemplate %busname%$%wirenum% will be forced. |
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/sort |
If specified, the netlist lines will be output in alphanumeric sorted order. |
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/subckt |
If specified, circuit is netlisted as subcircuit. In this case the netlist is enclosed with a .subckt control at the beginning and a .ends control at the end. |
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/template |
Property names to be used as templates. A template is a string that specifies a format to be used for the netlist line for the device that owns it. By default the template property name is "TEMPLATE". This can be overridden with this switch. Multiple template property names may be specified by separating them with a pipe symbol ('|'). See the description of the template property in User's Manual/Schematic Editor/Template Property . |
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/top |
For hierarchical schematics, the line ".KEEP /subs" is automatically output to tell the simulator to output data for all subcircuits. Specifying this switch inhibits this action thus restricting data output to the top level. |
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/wireTemplate |
Format for bus wires. wire_template may contain the keywords %BUSNAME% and %WIRENUM%. These resolve to the bus name and wire number respectively. So a spec set to %BUSNAME%#%WIRENUM% would give the default, i.e. bus names like BUS1#2. A spec of %busname%[%wirenum%] would give bus names like BUS1[2]. |
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filename |
File to which netlist is written. If not specified, the netlist is displayed in the message window. |
| ▲ Command Summary ▲ | ||
| ◄ MoveProperty | NewAnnotation ▶ | |