The Track and Hold for Discrete Filters models an analog tracking sample and hold. Whenever the clock is high, the output voltage tracks the input voltage. When the clock transitions low, the output is held at the last sampled value. This behavior is different than the Sampler and Zero Order Hold, which samples on a TRIG edge. As with the other devices in the Discrete Time Filter category, the Track and Hold for Discrete Filters is compatible with the SIMPLIS POP and AC Analyses.
The information in this topic refers to the latest Track and Hold for Discrete Filters which was introduced in version 8.10. In versions prior to 8.10, a similar Track and Hold exists and has the same behavior as the new version. The new version is implemented in a library file as opposed to a templatescript, but the electrical behavior is identical. If you require a track and hold for use in versions prior to 8.10, the old Track and Hold for Discrete Filters can be placed from the part selector location: .
Related topics:
In this topic:
Model Name: | Track and Hold for Discrete Filters | |||
Simulator: | This device is compatible with the SIMPLIS simulator. | |||
Parts Selector Menu Location: | ||||
Symbol Library: | simplis_discrete_time_filters.sxslb | |||
Model Library: | simplis_discrete_time_filters.lb | |||
Subcircuit Name: | SIMPLIS_DTF_TNH_Y__V2 | |||
Symbol: | ||||
Multiple Selections: | Only one device at a time can be edited. |
To configure the Track and Hold for Discrete Filters, follow these steps:
Label | Parameter Description |
Acquisition Time | Filter acquisition time in seconds |
Initial Condition | Initial condition of the Track and Hold output at time=0 |
The test circuit used to generate the waveform examples in the next section can be downloaded here: simplis_038_tandhold_example.sxsch.
In the circuit example, a 100kHz sine wave with a 1V amplitude ( +/- 1V peak ) is applied to the input of the Track and Hold. The clock has a frequency of 1MHz and a duty cycle of 50%. The output voltage tracks the input voltage when the clock is high and holds the last input state when the clock transitions low.
The following AC waveforms confirm the DC gain is 0dB as expected. The phase change though a Track and Hold will change with the duty cycle of the applied clock.
The subcircuit parameter names, data types, ranges, units, and descriptions are in the following table. The parameter names can be used to generate netlist entries for the device. For example, a valid Track and Hold for Discrete Filters netlist entry would be:
X$U1 28 0 0 0 SIMPLIS_DTF_TNH_Y__V2 vars: IC=0 T_ACQ=1n
Parameter Name | Label | Data Type | Range | Units | Parameter Description |
IC | Initial Condition | Number |
|
none | Initial condition of the Track and Hold output at time=0 |
T_ACQ | Acquisition Time | Number | min: 1f | s | Filter acquisition time in seconds |